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arm [2018/01/30 08:15] niziak created |
arm [2022/07/06 19:51] (current) niziak |
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| + | ====== ARM ====== | ||
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| ====== Registers ====== | ====== Registers ====== | ||
| * **r10** sl Stack limit | * **r10** sl Stack limit | ||
| * **r11** fp Argument pointer | * **r11** fp Argument pointer | ||
| - | * **r12** ip Temporary workspace | + | * **r12** ip Temporary workspace. Register r12 (IP) may be used by a linker as a scratch register between a routine and any subroutine it calls (for details, see §5.3.1.1, Use of IP by the linker). It can also be used within a routine to hold intermediate values between subroutine calls. |
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| - | Register r12 (IP) may be used by a linker as a scratch register between a routine and any subroutine it calls (for details, see §5.3.1.1, Use of IP by the linker). It can also be used within a routine to hold intermediate values between subroutine calls." | + | |
| * **r13** sp Stack pointer | * **r13** sp Stack pointer | ||
| * **r14** lr Link register Workspace | * **r14** lr Link register Workspace | ||
| + | |||
| + | ====== xPSR ====== | ||
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| + | Special-purpose program status registers (xPSR) | ||
| + | * ''APSR'' Application PSR contains the condition code flags. Before entering an exception, the processor saves the condition code flags on the stack | ||
| + | * ''IPSR'' Interrupt PSR contains the Interrupt Service Routine (ISR) number of the current exception activation. | ||
| + | * ''EPSR'' Execution PSR contains the Thumb state bit (T-bit). | ||
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